__INSN_BARRIER(3) BSD Library Functions Manual __INSN_BARRIER(3)NAME
__insn_barrier -- compiler reorder barrier
SYNOPSIS
#include <sys/cdefs.h>
void
__insn_barrier();
DESCRIPTION
The __insn_barrier() macro prevents GCC from moving code across the barrier. In other words, the compiler is not allowed to reorder read and
write commands below the barrier with the code preceding the barrier. Like with the volatile type qualifier, __insn_barrier() may be neces-
sary in some corner cases to prevent the compiler from misoptimizing.
SEE ALSO gcc(1), cdefs(3), mb(9)
Paul E. McKenney, Memory Barriers: a Hardware View for Software Hackers,
http://www.rdrop.com/users/paulmck/scalability/paper/whymb.2010.06.07c.pdf, June 7, 2010.
HISTORY
The __insn_barrier() macro first appeared in NetBSD 2.0.
BSD January 2, 2011 BSD
Check Out this Related Man Page
MB(9) BSD Kernel Developer's Manual MB(9)NAME
mb, mb_memory, mb_read, mb_write -- memory barriers
SYNOPSIS
#include <sys/lock.h>
void
mb_memory(void);
void
mb_read(void);
void
mb_write(void);
DESCRIPTION
Many types of processor can execute instructions in a different order than issued by the compiler or assembler. On a uniprocessor system,
out of order execution is transparent to the programmer, operating system and applications, as the processor must ensure that it is self con-
sistent.
On multiprocessor systems, out of order execution can present a problem where locks are not used to guarantee atomicity of access, because
loads and stores issued by any given processor can appear on the system bus (and thus appear to other processors) in an unpredictable order.
mb_memory(), mb_read(), and mb_write() can be used to control the order in which memory accesses occur, and thus the order in which those
accesses become visible to other processors. They can be used to implement ``lockless'' access to data structures where the necessary bar-
rier conditions are well understood.
Memory barriers can be computationally expensive, as they are considered ``serializing'' operations and may stall further execution until the
processor has drained internal buffers and re-synchronized.
The memory barrier primitives control only the order of memory access. They provide no guarantee that stores have been flushed to the bus,
or that loads have been made from the bus.
The memory barrier primitives are guaranteed only to prevent reordering of accesses to main memory. They do not provide any guarantee of
ordering when used with device memory (for example, loads or stores to or from a PCI device). To guarantee ordering of access to device mem-
ory, the bus_dma(9) and bus_space(9) interfaces should be used.
FUNCTIONS
mb_memory()
Issue a full memory barrier, ordering all memory accesses. Causes all loads and stores preceding the call to mb_memory() to complete
before further memory accesses can be made.
mb_read()
Issue a read memory barrier, ordering all loads from memory. Causes all loads preceding the call to mb_read() to complete before fur-
ther loads can be made. Stores may be reordered ahead of or behind a call to mb_read().
mb_write()
Issue a write memory barrier, ordering all stores to memory. Causes all stores preceding the call to mb_write() to complete before
further stores can be made. Loads may be reordered ahead of or behind a call to mb_write().
SEE ALSO __insn_barrier(3), bus_dma(9), bus_space(9), mutex(9), rwlock(9)HISTORY
The memory barrier primitives first appeared in NetBSD 5.0.
BSD January 2, 2011 BSD
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