syntax::highlight::engine::kate::verilog(3pm) debian man page | unix.com

Syntax::Highlight::Engine::Kate::Verilog(3pm)		User Contributed Perl Documentation	     Syntax::Highlight::Engine::Kate::Verilog(3pm)

NAME
       Syntax::Highlight::Engine::Kate::Verilog - a Plugin for Verilog syntax highlighting

SYNOPSIS
	require Syntax::Highlight::Engine::Kate::Verilog;
	my $sh = new Syntax::Highlight::Engine::Kate::Verilog([
	]);

DESCRIPTION
       Syntax::Highlight::Engine::Kate::Verilog is a  plugin module that provides syntax highlighting for Verilog to the
       Syntax::Haghlight::Engine::Kate highlighting engine.

       This code is generated from the syntax definition files used by the Kate project.  It works quite fine, but can use refinement and
       optimization.

       It inherits Syntax::Higlight::Engine::Kate::Template. See also there.

AUTHOR
       Hans Jeuken (haje <at> toneel <dot> demon <dot> nl)

BUGS
       Unknown. If you find any, please contact the author

perl v5.10.0							    2008-02-03			     Syntax::Highlight::Engine::Kate::Verilog(3pm)