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dpgen_dfft(3) [debian man page]

DPGEN_DFFT(3)						  Alliance - genlib User's Manual					     DPGEN_DFFT(3)

NAME
DPGEN_DFFT - Dynamic Flip-Flop with Scan-Path Macro-Generator SYNOPSIS
#include <genlib.h> void GENLIB_MACRO (DPGEN_DFFT, char *modelname, long flags, long N); DESCRIPTION
Generate a N bits dynamic flip-flop with scan-path named modelname. The two latches of this flip-flop are dynamic, i.e. the data is stored in a capacitor. How it works : o scan when set to '1' enables the scan-path mode. Note that in scan-path mode, the wen signal is not effective. o scin : the input of the scan-path. This terminal is different from i0[0]. The scout is q[N-1] (in the following example this is q[31]). o wen when set to '1' enables the writing of the flip-flop. TERMINAL NAMES 1. scan : scan-path mode (input, 1 bit). 2. scin : scan path in (input, 1 bit). 3. wen : write enable (input, 1 bit). 4. ck : clock signal (input, 1 bit). 5. i0 : data input (N bits). 6. q : output (N bits). 7. vdd : power. 8. vss : ground. EXAMPLE
GENLIB_MACRO(DPGEN_DFFT, "model_dfft_32" , F_BEHAV|F_PLACE , 32 ); GENLIB_LOINS( "model_dfft_32" , "instance1_dfft_32" , "scan" , "scin" , "wen" , "ck" , "i0[31:0]" , "q[31:0]" /* a[31] is "scout". */ , "vdd", "vss", NULL ); SEE ALSO
GENLIB_MACRO(3), genlib(1) ASIM
/LIP6 30 July 2004 DPGEN_DFFT(3)

Check Out this Related Man Page

DPGEN_ADSB2F(3) 					  Alliance - genlib User's Manual					   DPGEN_ADSB2F(3)

NAME
DPGEN_ADSB2F - Adder/Substractor Macro-Generator SYNOPSIS
#include <genlib.h> void GENLIB_MACRO (DPGEN_ADSB2F, char *modelname, long flags, long N); DESCRIPTION
Generate a N bits adder/substractor named modelname. How it works : o if the add_sub signal is set to '0' an addition is performed, otherwise it's a substraction. o Operation can be either signed or unsigned. In unsigned mode c31 is the overflow, in unsigned mode you have to compute overflow by XORing c31 and c30. TERMINAL NAMES 1. add_sub : select addition or substraction (input, 1 bit). 2. c31 : carry out. In unsigned mode, this is the overflow (output, 1 bits). 3. c30 : used to compute overflow in signed mode : overflow := c31 xor c30 (output, 1 bits). 4. i1 : first operand (input, N bits). 5. i0 : second operand (input, N bits). 6. q : output (N bits). 7. vdd : power. 8. vss : ground. EXAMPLE
GENLIB_MACRO(DPGEN_ADSB2F, "model_adsb2f_32" , F_BEHAV|F_PLACE , 32 ); GENLIB_LOINS( "model_adsb2f_32" , "instance1_adsb2f_32" , "add_sub" , "c32" , "c31" , "i1[31:0]" , "i0[31:0]" , "q[31:0]" , "vdd", "vss", NULL ); SEE ALSO
GENLIB_MACRO(3), genlib(1) ASIM
/LIP6 30 July 2004 DPGEN_ADSB2F(3)
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