RTLBROWSE(1) File Viewing RTLBROWSE(1)
NAME
rtlbrowse - Allows hierarchical browsing of Verilog HDL sourcecode and library design files.
SYNTAX
rtlbrowse <stemsfilename>
DESCRIPTION
Allows hierarchical browsing of Verilog HDL sourcecode and library design files. Navigation through the hierarchy may be done by clicking
open areas of the tree widget and clicking on the individual levels of hierarchy. Inside the sourcecode, selecting the module instantia-
tion name by double clicking or selecting part of the name through drag-clicking will descend deeper into the RTL hierarchy. Note that it
performs optional source code annotation when called as a helper application by gtkwave(1) and when the primary marker is set. Source
code annotation is not available for all supported dumpfile types. It is directly available for LXT2, VZT, FST, and AET2. For VCD, use
the -o,--optimize option of gtkwave(1) in order to optimize the VCD file into FST. All other dumpfile types (LXT, GHW) are unsupported at
this time.
EXAMPLES
To run this program the standard way type:
rtlbrowse stemsfile
The RTL is then brought up in a GTK tree viewer. Stems must have been previously generated with vermin(1) or some other tool capa-
ble of generating compatible stemsfiles. Note that gtkwave(1) will bring up this program as a client application for sourcecode
annotation. It does that by bringing up the viewer with the shared memory ID of a segment of memory in the viewer rather than using
a stems filename.
AUTHORS
Anthony Bybell <bybell@rocketmail.com>
SEE ALSO
vermin(1) gtkwave(1)
Anthony Bybell 3.3.28 RTLBROWSE(1)
