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wake_up_bit(9) [centos man page]

WAKE_UP_BIT(9)							   Driver Basics						    WAKE_UP_BIT(9)

wake_up_bit - wake up a waiter on a bit SYNOPSIS
void wake_up_bit(void * word, int bit); ARGUMENTS
word the word being waited on, a kernel virtual address bit the bit of the word being waited on DESCRIPTION
There is a standard hashed waitqueue table for generic use. This is the part of the hashtable's accessor API that wakes up waiters on a bit. For instance, if one were to have waiters on a bitflag, one would call wake_up_bit after clearing the bit. In order for this to function properly, as it uses waitqueue_active internally, some kind of memory barrier must be done prior to calling this. Typically, this will be smp_mb__after_clear_bit, but in some cases where bitflags are manipulated non-atomically under a lock, one may need to use a less regular barrier, such fs/inode.c's smp_mb, because spin_unlock does not guarantee a memory barrier. COPYRIGHT
Kernel Hackers Manual 3.10 June 2014 WAKE_UP_BIT(9)

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membar_ops(3C)															    membar_ops(3C)

membar_ops, membar_enter, membar_exit, membar_producer, membar_consumer - memory access synchronization barrier operations SYNOPSIS
#include <atomic.h> void membar_enter(void); void membar_exit(void); void membar_producer(void); void membar_consumer(void); The membar_enter() function is a generic memory barrier used during lock entry. It is placed after the memory operation that acquires the lock to guarantee that the lock protects its data. No stores from after the memory barrier will reach visibility and no loads from after the barrier will be resolved before the lock acquisition reaches global visibility. The membar_exit() function is a generic memory barrier used during lock exit. It is placed before the memory operation that releases the lock to guarantee that the lock protects its data. All loads and stores issued before the barrier will be resolved before the sub- sequent lock update reaches visibility. The membar_enter() and membar_exit() functions are used together to allow regions of code to be in relaxed store order and then ensure that the load or store order is maintained at a higher level. They are useful in the implementation of mutex exclusion locks. The membar_producer() function arranges for all stores issued before this point in the code to reach global visibility before any stores that follow. This is useful in producer modules that update a data item, then set a flag that it is available. The memory barrier guaran- tees that the available flag is not visible earlier than the updated data, thereby imposing store ordering. The membar_consumer() function arranges for all loads issued before this point in the code to be completed before any subsequent loads. This is useful in consumer modules that check if data is available and read the data. The memory barrier guarantees that the data is not sampled until after the available flag has been seen, thereby imposing load ordering. No values are returned. No errors are defined. See attributes(5) for descriptions of the following attributes: +-----------------------------+-----------------------------+ | ATTRIBUTE TYPE | ATTRIBUTE VALUE | +-----------------------------+-----------------------------+ |Interface Stability |Stable | +-----------------------------+-----------------------------+ |MT-Level |MT-Safe | +-----------------------------+-----------------------------+ atomic_add(3C), atomic_and(3C), atomic_bits(3C), atomic_cas(3C), atomic_dec(3C), atomic_inc(3C), atomic_ops(3C), atomic_or(3C), atomic_swap(3C), attributes(5), atomic_ops(9F) Atomic instructions (see atomic_ops(3C)) ensure global visibility of atomically-modified variables on completion. In a relaxed store order system, this does not guarantee that the visibility of other variables will be synchronized with the completion of the atomic instruction. If such synchronization is required, memory barrier instructions must be used. 14 Feb 2005 membar_ops(3C)
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