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struct_spi_message(9) [centos man page]

STRUCT 
SPI_MESSAGE(9) Serial Peripheral Interface (S STRUCT SPI_MESSAGE(9) NAME
struct_spi_message - one multi-segment SPI transaction SYNOPSIS
struct spi_message { struct list_head transfers; struct spi_device * spi; unsigned is_dma_mapped:1; void (* complete) (void *context); void * context; unsigned actual_length; int status; struct list_head queue; void * state; }; MEMBERS
transfers list of transfer segments in this transaction spi SPI device to which the transaction is queued is_dma_mapped if true, the caller provided both dma and cpu virtual addresses for each transfer buffer complete called to report transaction completions context the argument to complete when it's called actual_length the total number of bytes that were transferred in all successful segments status zero for success, else negative errno queue for use by whichever driver currently owns the message state for use by whichever driver currently owns the message DESCRIPTION
A spi_message is used to execute an atomic sequence of data transfers, each represented by a struct spi_transfer. The sequence is "atomic" in the sense that no other spi_message may use that SPI bus until that sequence completes. On some systems, many such sequences can execute as as single programmed DMA transfer. On all systems, these messages are queued, and might complete after transactions to other devices. Messages sent to a given spi_device are alway executed in FIFO order. The code that submits an spi_message (and its spi_transfers) to the lower layers is responsible for managing its memory. Zero-initialize every field you don't set up explicitly, to insulate against future API updates. After you submit a message and its transfers, ignore them until its completion callback. COPYRIGHT
Kernel Hackers Manual 3.10 June 2014 STRUCT SPI_MESSAGE(9)

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STRUCT 
SPI_MASTER(9) Serial Peripheral Interface (S STRUCT SPI_MASTER(9) NAME
struct_spi_master - interface to SPI master controller SYNOPSIS
struct spi_master { struct device dev; s16 bus_num; u16 num_chipselect; u16 dma_alignment; u16 mode_bits; u16 flags; #define SPI_MASTER_HALF_DUPLEX BIT(0) #define SPI_MASTER_NO_RX BIT(1) #define SPI_MASTER_NO_TX BIT(2) int (* setup) (struct spi_device *spi); int (* transfer) (struct spi_device *spi,struct spi_message *mesg); void (* cleanup) (struct spi_device *spi); }; MEMBERS
dev device interface to this driver bus_num board-specific (and often SOC-specific) identifier for a given SPI controller. num_chipselect chipselects are used to distinguish individual SPI slaves, and are numbered from zero to num_chipselects. each slave has a chipselect signal, but it's common that not every chipselect is connected to a slave. dma_alignment SPI controller constraint on DMA buffers alignment. mode_bits flags understood by this controller driver flags other constraints relevant to this driver setup updates the device mode and clocking records used by a device's SPI controller; protocol code may call this. This must fail if an unrecognized or unsupported mode is requested. It's always safe to call this unless transfers are pending on the device whose settings are being modified. transfer adds a message to the controller's transfer queue. cleanup frees controller-specific state DESCRIPTION
Each SPI master controller can communicate with one or more spi_device children. These make a small bus, sharing MOSI, MISO and SCK signals but not chip select signals. Each device may be configured to use a different clock rate, since those shared signals are ignored unless the chip is selected. The driver for an SPI controller manages access to those devices through a queue of spi_message transactions, copying data between CPU memory and an SPI slave device. For each such message it queues, it calls the message's completion function when the transaction completes. COPYRIGHT
Kernel Hackers Manual 2.6. July 2010 STRUCT SPI_MASTER(9)

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