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struct_nand_ecc_ctrl(9) [centos man page]

STRUCT 
NAND_ECC_CTRL(9) Structures STRUCT NAND_ECC_CTRL(9) NAME
struct_nand_ecc_ctrl - Control structure for ECC SYNOPSIS
struct nand_ecc_ctrl { nand_ecc_modes_t mode; int steps; int size; int bytes; int total; int strength; int prepad; int postpad; struct nand_ecclayout * layout; void * priv; void (* hwctl) (struct mtd_info *mtd, int mode); int (* calculate) (struct mtd_info *mtd, const uint8_t *dat,uint8_t *ecc_code); int (* correct) (struct mtd_info *mtd, uint8_t *dat, uint8_t *read_ecc,uint8_t *calc_ecc); int (* read_page_raw) (struct mtd_info *mtd, struct nand_chip *chip,uint8_t *buf, int oob_required, int page); int (* write_page_raw) (struct mtd_info *mtd, struct nand_chip *chip,const uint8_t *buf, int oob_required); int (* read_page) (struct mtd_info *mtd, struct nand_chip *chip,uint8_t *buf, int oob_required, int page); int (* read_subpage) (struct mtd_info *mtd, struct nand_chip *chip,uint32_t offs, uint32_t len, uint8_t *buf); int (* write_subpage) (struct mtd_info *mtd, struct nand_chip *chip,uint32_t offset, uint32_t data_len,const uint8_t *data_buf, int oob_required); int (* write_page) (struct mtd_info *mtd, struct nand_chip *chip,const uint8_t *buf, int oob_required); int (* write_oob_raw) (struct mtd_info *mtd, struct nand_chip *chip,int page); int (* read_oob_raw) (struct mtd_info *mtd, struct nand_chip *chip,int page); int (* read_oob) (struct mtd_info *mtd, struct nand_chip *chip, int page); int (* write_oob) (struct mtd_info *mtd, struct nand_chip *chip,int page); }; MEMBERS
mode ECC mode steps number of ECC steps per page size data bytes per ECC step bytes ECC bytes per step total total number of ECC bytes per page strength max number of correctible bits per ECC step prepad padding information for syndrome based ECC generators postpad padding information for syndrome based ECC generators layout ECC layout control struct pointer priv pointer to private ECC control data hwctl function to control hardware ECC generator. Must only be provided if an hardware ECC is available calculate function for ECC calculation or readback from ECC hardware correct function for ECC correction, matching to ECC generator (sw/hw) read_page_raw function to read a raw page without ECC write_page_raw function to write a raw page without ECC read_page function to read a page according to the ECC generator requirements; returns maximum number of bitflips corrected in any single ECC step, 0 if bitflips uncorrectable, -EIO hw error read_subpage function to read parts of the page covered by ECC; returns same as read_page write_subpage function to write parts of the page covered by ECC. write_page function to write a page according to the ECC generator requirements. write_oob_raw function to write chip OOB data without ECC read_oob_raw function to read chip OOB data without ECC read_oob function to read chip OOB data write_oob function to write chip OOB data AUTHOR
Thomas Gleixner <tglx@linutronix.de> Author. COPYRIGHT
Kernel Hackers Manual 3.10 June 2014 STRUCT NAND_ECC_CTRL(9)

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STRUCT 
IRQ_DESC(9) Structures STRUCT IRQ_DESC(9) NAME
struct_irq_desc - interrupt descriptor SYNOPSIS
struct irq_desc { unsigned int irq; struct timer_rand_state * timer_rand_state; unsigned int * kstat_irqs; #ifdef CONFIG_INTR_REMAP struct irq_2_iommu * irq_2_iommu; #endif irq_flow_handler_t handle_irq; struct irq_chip * chip; struct msi_desc * msi_desc; void * handler_data; void * chip_data; struct irqaction * action; unsigned int status; unsigned int depth; unsigned int wake_depth; unsigned int irq_count; unsigned long last_unhandled; unsigned int irqs_unhandled; raw_spinlock_t lock; #ifdef CONFIG_SMP cpumask_var_t affinity; unsigned int node; #ifdef CONFIG_GENERIC_PENDING_IRQ cpumask_var_t pending_mask; #endif #endif atomic_t threads_active; wait_queue_head_t wait_for_threads; #ifdef CONFIG_PROC_FS struct proc_dir_entry * dir; #endif const char * name; }; MEMBERS
irq interrupt number for this descriptor timer_rand_state pointer to timer rand state struct kstat_irqs irq stats per cpu irq_2_iommu iommu with this irq handle_irq highlevel irq-events handler [if NULL, __do_IRQ] chip low level interrupt hardware access msi_desc MSI descriptor handler_data per-IRQ data for the irq_chip methods chip_data platform-specific per-chip private data for the chip methods, to allow shared chip implementations action the irq action chain status status information depth disable-depth, for nested irq_disable calls wake_depth enable depth, for multiple set_irq_wake callers irq_count stats field to detect stalled irqs last_unhandled aging timer for unhandled count irqs_unhandled stats field for spurious unhandled interrupts lock locking for SMP affinity IRQ affinity on SMP node node index useful for balancing pending_mask pending rebalanced interrupts threads_active number of irqaction threads currently running wait_for_threads wait queue for sync_irq to wait for threaded handlers dir /proc/irq/ procfs entry name flow handler name for /proc/interrupts output AUTHORS
Thomas Gleixner <tglx@linutronix.de> Author. Ingo Molnar <mingo@elte.hu> Author. COPYRIGHT
Kernel Hackers Manual 2.6. July 2010 STRUCT IRQ_DESC(9)
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