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struct_irq_chip_generic(9) [centos man page]

STRUCT 
IRQ_CHIP_GENE(9) Structures STRUCT IRQ_CHIP_GENE(9) NAME
struct_irq_chip_generic - Generic irq chip data structure SYNOPSIS
struct irq_chip_generic { raw_spinlock_t lock; void __iomem * reg_base; unsigned int irq_base; unsigned int irq_cnt; u32 mask_cache; u32 type_cache; u32 polarity_cache; u32 wake_enabled; u32 wake_active; unsigned int num_ct; void * private; struct list_head list; struct irq_chip_type chip_types[0]; }; MEMBERS
lock Lock to protect register and cache data access reg_base Register base address (virtual) irq_base Interrupt base nr for this chip irq_cnt Number of interrupts handled by this chip mask_cache Cached mask register type_cache Cached type register polarity_cache Cached polarity register wake_enabled Interrupt can wakeup from suspend wake_active Interrupt is marked as an wakeup from suspend source num_ct Number of available irq_chip_type instances (usually 1) private Private data for non generic chip callbacks list List head for keeping track of instances chip_types[0] Array of interrupt irq_chip_types DESCRIPTION
Note, that irq_chip_generic can have multiple irq_chip_type implementations which can be associated to a particular irq line of an irq_chip_generic instance. That allows to share and protect state in an irq_chip_generic instance when we need to implement different flow mechanisms (level/edge) for it. AUTHORS
Thomas Gleixner <tglx@linutronix.de> Author. Ingo Molnar <mingo@elte.hu> Author. COPYRIGHT
Kernel Hackers Manual 3.10 June 2014 STRUCT IRQ_CHIP_GENE(9)

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STRUCT 
IRQ_CHIP(9) Structures STRUCT IRQ_CHIP(9) NAME
struct_irq_chip - hardware interrupt chip descriptor SYNOPSIS
struct irq_chip { const char * name; unsigned int (* startup) (unsigned int irq); void (* shutdown) (unsigned int irq); void (* enable) (unsigned int irq); void (* disable) (unsigned int irq); void (* ack) (unsigned int irq); void (* mask) (unsigned int irq); void (* mask_ack) (unsigned int irq); void (* unmask) (unsigned int irq); void (* eoi) (unsigned int irq); void (* end) (unsigned int irq); int (* set_affinity) (unsigned int irq,const struct cpumask *dest); int (* retrigger) (unsigned int irq); int (* set_type) (unsigned int irq, unsigned int flow_type); int (* set_wake) (unsigned int irq, unsigned int on); void (* bus_lock) (unsigned int irq); void (* bus_sync_unlock) (unsigned int irq); #ifdef CONFIG_IRQ_RELEASE_METHOD void (* release) (unsigned int irq, void *dev_id); #endif const char * typename; }; MEMBERS
name name for /proc/interrupts startup start up the interrupt (defaults to ->enable if NULL) shutdown shut down the interrupt (defaults to ->disable if NULL) enable enable the interrupt (defaults to chip->unmask if NULL) disable disable the interrupt ack start of a new interrupt mask mask an interrupt source mask_ack ack and mask an interrupt source unmask unmask an interrupt source eoi end of interrupt - chip level end end of interrupt - flow level set_affinity set the CPU affinity on SMP machines retrigger resend an IRQ to the CPU set_type set the flow type (IRQ_TYPE_LEVEL/etc.) of an IRQ set_wake enable/disable power-management wake-on of an IRQ bus_lock function to lock access to slow bus (i2c) chips bus_sync_unlock function to sync and unlock slow bus (i2c) chips release release function solely used by UML typename obsoleted by name, kept as migration helper AUTHORS
Thomas Gleixner <tglx@linutronix.de> Author. Ingo Molnar <mingo@elte.hu> Author. COPYRIGHT
Kernel Hackers Manual 2.6. July 2010 STRUCT IRQ_CHIP(9)
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