SATA_LINK_SCR_LPM(9) libata Library SATA_LINK_SCR_LPM(9)NAME
sata_link_scr_lpm - manipulate SControl IPM and SPM fields
int sata_link_scr_lpm(struct ata_link * link, enum ata_lpm_policy policy, bool spm_wakeup);
ATA link to manipulate SControl for
LPM policy to configure
initiate LPM transition to active state
Manipulate the IPM field of the SControl register of link according to policy. If policy is ATA_LPM_MAX_POWER and spm_wakeup is true, the
SPM field is manipulated to wake up the link. This function also clears PHYRDY_CHG before returning.
0 on succes, -errno otherwise.
COPYRIGHT Kernel Hackers Manual 3.10 June 2014 SATA_LINK_SCR_LPM(9)
Check Out this Related Man Page
ATA_SLAVE_LINK_INIT(9) libata Library ATA_SLAVE_LINK_INIT(9)NAME
ata_slave_link_init - initialize slave link
int ata_slave_link_init(struct ata_port * ap);
port to initialize slave link for
Create and initialize slave link for ap. This enables slave link handling on the port.
In libata, a port contains links and a link contains devices. There is single host link but if a PMP is attached to it, there can be
multiple fan-out links. On SATA, there's usually a single device connected to a link but PATA and SATA controllers emulating TF based
interface can have two - master and slave.
However, there are a few controllers which don't fit into this abstraction too well - SATA controllers which emulate TF interface with both
master and slave devices but also have separate SCR register sets for each device. These controllers need separate links for physical link
handling (e.g. onlineness, link speed) but should be treated like a traditional M/S controller for everything else (e.g. command issue,
slave_link is libata's way of handling this class of controllers without impacting core layer too much. For anything other than physical
link handling, the default host link is used for both master and slave. For physical link handling, separate ap->slave_link is used. All
dirty details are implemented inside libata core layer. From LLD's POV, the only difference is that prereset, hardreset and postreset are
called once more for the slave link, so the reset sequence looks like the following.
prereset(M) -> prereset(S) -> hardreset(M) -> hardreset(S) -> softreset(M) -> postreset(M) -> postreset(S)
Note that softreset is called only for the master. Softreset resets both M/S by definition, so SRST on master should handle both (the
standard method will work just fine).
Should be called before host is registered.
0 on success, -errno on failure.
COPYRIGHT Kernel Hackers Manual 3.10 June 2014 ATA_SLAVE_LINK_INIT(9)
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