PANIC_NAND_WAIT_READ(9) Internal Functions Provided PANIC_NAND_WAIT_READ(9)NAME
panic_nand_wait_ready - [GENERIC] Wait for the ready pin after commands.
SYNOPSIS
void panic_nand_wait_ready(struct mtd_info * mtd, unsigned long timeo);
ARGUMENTS
mtd
MTD device structure
timeo
Timeout
DESCRIPTION
Helper function for nand_wait_ready used when needing to wait in interrupt context.
AUTHOR
Thomas Gleixner <tglx@linutronix.de>
Author.
COPYRIGHT Kernel Hackers Manual 3.10 June 2014 PANIC_NAND_WAIT_READ(9)
Check Out this Related Man Page
STRUCT NAND_CHIP(9) Structures STRUCT NAND_CHIP(9)NAME
struct_nand_chip - NAND Private Flash Chip Data
SYNOPSIS
struct nand_chip {
void __iomem * IO_ADDR_R;
void __iomem * IO_ADDR_W;
uint8_t (* read_byte) (struct mtd_info *mtd);
u16 (* read_word) (struct mtd_info *mtd);
void (* write_buf) (struct mtd_info *mtd, const uint8_t *buf, int len);
void (* read_buf) (struct mtd_info *mtd, uint8_t *buf, int len);
int (* verify_buf) (struct mtd_info *mtd, const uint8_t *buf, int len);
void (* select_chip) (struct mtd_info *mtd, int chip);
int (* block_bad) (struct mtd_info *mtd, loff_t ofs, int getchip);
int (* block_markbad) (struct mtd_info *mtd, loff_t ofs);
void (* cmd_ctrl) (struct mtd_info *mtd, int dat,unsigned int ctrl);
int (* dev_ready) (struct mtd_info *mtd);
void (* cmdfunc) (struct mtd_info *mtd, unsigned command, int column, int page_addr);
int (* waitfunc) (struct mtd_info *mtd, struct nand_chip *this);
void (* erase_cmd) (struct mtd_info *mtd, int page);
int (* scan_bbt) (struct mtd_info *mtd);
int (* errstat) (struct mtd_info *mtd, struct nand_chip *this, int state, int status, int page);
int (* write_page) (struct mtd_info *mtd, struct nand_chip *chip,const uint8_t *buf, int page, int cached, int raw);
int chip_delay;
unsigned int options;
int page_shift;
int phys_erase_shift;
int bbt_erase_shift;
int chip_shift;
int numchips;
uint64_t chipsize;
int pagemask;
int pagebuf;
int subpagesize;
uint8_t cellinfo;
int badblockpos;
flstate_t state;
uint8_t * oob_poi;
struct nand_hw_control * controller;
struct nand_ecclayout * ecclayout;
struct nand_ecc_ctrl ecc;
struct nand_buffers * buffers;
struct nand_hw_control hwcontrol;
struct mtd_oob_ops ops;
uint8_t * bbt;
struct nand_bbt_descr * bbt_td;
struct nand_bbt_descr * bbt_md;
struct nand_bbt_descr * badblock_pattern;
void * priv;
};
MEMBERS
IO_ADDR_R
[BOARDSPECIFIC] address to read the 8 I/O lines of the flash device
IO_ADDR_W
[BOARDSPECIFIC] address to write the 8 I/O lines of the flash device
read_byte
[REPLACEABLE] read one byte from the chip
read_word
[REPLACEABLE] read one word from the chip
write_buf
[REPLACEABLE] write data from the buffer to the chip
read_buf
[REPLACEABLE] read data from the chip into the buffer
verify_buf
[REPLACEABLE] verify buffer contents against the chip data
select_chip
[REPLACEABLE] select chip nr
block_bad
[REPLACEABLE] check, if the block is bad
block_markbad
[REPLACEABLE] mark the block bad
cmd_ctrl
[BOARDSPECIFIC] hardwarespecific funtion for controlling ALE/CLE/nCE. Also used to write command and address
dev_ready
[BOARDSPECIFIC] hardwarespecific function for accesing device ready/busy line If set to NULL no access to ready/busy is available and
the ready/busy information is read from the chip status register
cmdfunc
[REPLACEABLE] hardwarespecific function for writing commands to the chip
waitfunc
[REPLACEABLE] hardwarespecific function for wait on ready
erase_cmd
[INTERN] erase command write function, selectable due to AND support
scan_bbt
[REPLACEABLE] function to scan bad block table
errstat
[OPTIONAL] hardware specific function to perform additional error status checks (determine if errors are correctable)
write_page
[REPLACEABLE] High-level page write function
chip_delay
[BOARDSPECIFIC] chip dependent delay for transfering data from array to read regs (tR)
options
[BOARDSPECIFIC] various chip options. They can partly be set to inform nand_scan about special functionality. See the defines for
further explanation
page_shift
[INTERN] number of address bits in a page (column address bits)
phys_erase_shift
[INTERN] number of address bits in a physical eraseblock
bbt_erase_shift
[INTERN] number of address bits in a bbt entry
chip_shift
[INTERN] number of address bits in one chip
numchips
[INTERN] number of physical chips
chipsize
[INTERN] the size of one chip for multichip arrays
pagemask
[INTERN] page number mask = number of (pages / chip) - 1
pagebuf
[INTERN] holds the pagenumber which is currently in data_buf
subpagesize
[INTERN] holds the subpagesize
cellinfo
[INTERN] MLC/multichip data from chip ident
badblockpos
[INTERN] position of the bad block marker in the oob area
state
[INTERN] the current state of the NAND device
oob_poi
poison value buffer
controller
[REPLACEABLE] a pointer to a hardware controller structure which is shared among multiple independend devices
ecclayout
[REPLACEABLE] the default ecc placement scheme
ecc
[BOARDSPECIFIC] ecc control ctructure
buffers
buffer structure for read/write
hwcontrol
platform-specific hardware control structure
ops
oob operation operands
bbt
[INTERN] bad block table pointer
bbt_td
[REPLACEABLE] bad block table descriptor for flash lookup
bbt_md
[REPLACEABLE] bad block table mirror descriptor
badblock_pattern
[REPLACEABLE] bad block scan pattern used for initial bad block scan
priv
[OPTIONAL] pointer to private chip date
AUTHOR
Thomas Gleixner <tglx@linutronix.de>
Author.
COPYRIGHT Kernel Hackers Manual 2.6. July 2010 STRUCT NAND_CHIP(9)