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fetchi(2) [bsd man page]

FETCHI(2)							System Calls Manual							 FETCHI(2)

fetchi - fetch from user instruction space (2BSD) SYNOPSIS
fetchi(addr) int *addr; DESCRIPTION
Fetchi fetches the word at addr from the caller's instruction space. This system call is required on PDP-11's with separate instruction and data spaces because the mfpi instruction reads from D-space if the current and previous modes in the program status word are both user. RETURN VALUE
Upon successful completion the contents of the caller's instruction space at addr are returned. Otherwise, a value of -1 is returned. ERRORS
[EINVAL] The kernel has not been compiled for a processor with separate I/D. [EFAULT] Addr points to an address not in the process's allocated instruction space. BUGS
The error indication, -1, is a legitimate function value; errno, (see intro(2)), can be used to disambiguate. Fetchi is a kludge and exists only to circumvent an alleged security feature on some DEC PDP-11 processors. Fetchi is unique to the PDP-11 and 2BSD; its use is discouraged. 3rd Berkeley Distribution January 22, 1987 FETCHI(2)

Check Out this Related Man Page

sync_instruction_memory(3C)				   Standard C Library Functions 			       sync_instruction_memory(3C)

sync_instruction_memory - make modified instructions executable SYNOPSIS
void sync_instruction_memory(caddr_t addr, int len); DESCRIPTION
The sync_instruction_memory() function performs whatever steps are required to make instructions modified by a program executable. Some processor architectures, including some SPARC processors, have separate and independent instruction and data caches which are not kept consistent by hardware. For example, if the instruction cache contains an instruction from some address and the program then stores a new instruction at that address, the new instruction may not be immediately visible to the instruction fetch mechanism. Software must explicitly invalidate the instruction cache entries for new or changed mappings of pages that might contain executable instructions. The sync_instruction_memory() function performs this function, and/or any other functions needed to make modified instructions between addr and addr+len visible. A program should call sync_instruction_memory() after modifying instructions and before executing them. On processors with unified caches (one cache for both instructions and data) and pipelines which are flushed by a branch instruction, such as the x86 architecture, the function may do nothing and just return. The changes are immediately visible to the thread calling sync_instruction_memory() when the call returns, even if the thread should migrate to another processor during or after the call. The changes become visible to other threads in the same manner that stores do; that is, they eventually become visible, but the latency is implementation-dependent. The result of executing sync_instruction_memory() are unpredictable if addr through addr+len-1 are not valid for the address space of the program making the call. RETURN VALUES
No values are returned. ATTRIBUTES
See attributes(5) for descriptions of the following attributes: +-----------------------------+-----------------------------+ | ATTRIBUTE TYPE | ATTRIBUTE VALUE | +-----------------------------+-----------------------------+ |MT-Level |MT-Safe | +-----------------------------+-----------------------------+ SEE ALSO
attributes(5) SunOS 5.11 12 Feb 1997 sync_instruction_memory(3C)
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