Building programs from separate makefiles


 
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# 8  
Old 01-24-2013
There was a makefile in every subdirectory which together build each program. Now I have just a single makefile for every program, and a main Makefile.
# 9  
Old 01-24-2013
Quote:
Originally Posted by kristinu
There was a makefile in every subdirectory which together build each program. Now I have just a single makefile for every program, and a main Makefile.
Yes. So you turned a build system with one makefile, per program..

Into a build system with one makefile, per program...

But jumbled them all into one folder instead of leaving them where they belong.

How is this better exactly?

You can use makefiles to call makefiles in other folders with make -C like I've demonstrated.
# 10  
Old 01-24-2013
I'm getting you, so I should put them in the directory where the main of each program resides. Is this what your are saying? Can do that. The original was using several libraries to build each program, with each library having its own makefile
# 11  
Old 01-24-2013
What are you trying to do with your new makefiles that the old ones couldn't do? If all you want is a central point of control, make -C can do that.
# 12  
Old 01-24-2013
That's what I need central point of control.
# 13  
Old 01-24-2013
Imagine a tree of files like this:

Code:
   .
   |-Makefile
   |-folder1
   |---Makefile
   |---out1
   |-folder2
   |---Makefile
   |---out2
   |-folder3
   |---Makefile
   |---out3
   |-folder4
   |---Makefile
   |---out4

The individual makefiles look like this:

Code:
out2:
        echo out2 > out2

And the makefile in the root folder looks like this:
Code:
OBJS=folder1/out1 folder2/out2 folder3/out3 folder4/out4

finalresult:$(OBJS)
        cat $(OBJS) > finalresult

folder1/out1:
        make -C folder1

folder2/out2:
        make -C folder2

folder3/out3:
        make -C folder3

folder4/out4:
        make -C folder4

clean:
        rm -f $(OBJS) finalresult

So when you run make, the root makefile runs make inside each of the sub-folders, and uses the files they make to assemble the final result.
# 14  
Old 01-24-2013
Does the following rule create a problem? I have a target nraypk
that calls another makefile raypk.mk to build nraypk. Does the
fact that they have the same name (nraypk) cause a problem?

Code:
nraypk :
    $(MAKE) -C ./mk -f raypk.mk nraypk

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