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Makefile doesn't update $< variable

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# 1  
Old 04-01-2011
Makefile doesn't update $< variable
Hello guys,

I could use advise from more experienced guys about my Makefile. In short, the problem with my Makefile is that $< doesnt change
inside my rule.

Here is my Makefile:

Code:
# Makefile for CORE

CC = gcc.exe
AS = as.exe
AR = ar.exe

INCLUDE = \
-I../lib/tomcrypt/inc \
-I../lib/tommath/inc \
-I../lib/hal_dev/traces_gnu/inc \


CFLAGS = -DCORE_SW_VERSION='"CORE.07.01.04.01.03.01.R"' -D__HAL_DBG__ -D__MQX_FIO__ -O1 -g3 -Wall -c -fmessage-length=0  -std=c99 -fgnu89-inline -mno-volatile-cache $(INCLUDE)


OBJDIR = $(shell pwd)
SOURCEDIR = ../sources
PATTERN = ..

#this scans for .c files, and there is a lot of them
CSRC := $(shell find $(SOURCEDIR) -name '*.c')

#I have also tried with CSRC = $(shell find $(SOURCEDIR) -name '*.c'), same thing

OBJ = $(CSRC:.c=.o)
OBJS = $(patsubst ../%,$(OBJDIR)/%,$(OBJ)) 



.PHONY: all
all: $(OBJS)	
	../libprocess.sh dev traces_gnu 16.01.06.01.06.00 dummy
	$(AR) -q CORE.07.01.04.01.03.01.R.a $(OBJS)	
	../release.sh dev dev CORE.07.01.04.01.03.01.R traces_gnu CORE.07.01.04.01.03.01.R.a GNU dummy

.PHONY: csrc
csrc: $(CSRC)
	$(CC) $(CFLAGS) $(CSRC)

.PHONY: asm
asm: $(SSRC)
	$(AS) $(SSRC)

.PHONY: clean
clean:
	rm -f $(OBJS)
	
$(OBJS): $(CSRC)		
	mkdir -p $(dir $@)	
	$(CC) $(CFLAGS) $< -o $@

------------------------

Now, I have printed $< inside my $(OBJS) rule and I can see that this doesn't change, that it's always first file in the line of the strings.
Do you see where is the mistake? Thanks!
Last edited by pludi; 04-01-2011 at 11:57 AM..
# 2  
Old 04-01-2011
Try running make with the -d option and see what it tells you.
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