vme_manual_setup(7) Miscellaneous Information Manual vme_manual_setup(7)
NAME
vme_manual_setup, sys_attrs_vba_vipvic - Describes how to set up VIP/VIC-based Alpha VME systems for use on the VMEbus, including how to
modify attributes of the vba_vipvic kernel subsystem
DESCRIPTION
VMEbus setup allows you to run the operating system on the following VIP/VIC-based AXPvme and Alpha VME systems:
AXPvme single-board computers (SBCs) Alpha VME 4/224 and 4/228 SBCs Alpha VME 5/352 and 5/480 SBCs Alpha VME 2100 system
For information about installing the operating system on the listed systems, see the Installation Guide.
For information about setting up UNIVERSE II-based Alpha VME systems for use on the VMEbus, see the sys_attrs_vba_univ(7) reference page.
See System Configuration Supplement: OEM Platforms for detailed information about the use of the VMEbus on the listed systems, including
the following topics: Configuring the vba_vipvic subsystem Configuring VMEbus A32 and A24 address spaces Configuring the VMEbus A16 address
space Configuring VMEbus interrupts Using VMEbus hardware byte-swapping modes Sharing memory between big endian and little endian proces-
sors Performing VMEbus slave block transfers Performing VMEbus master block transfers with local DMA Using the realtime interrupt-handling
routine rt_post_callout
The defaults supplied for various VMEbus parameters are listed below. The default values specified should provide proper VMEbus operation
for most applications. Be careful when modifying these values; not all adapters support all fields. Parameter Default Meaning
-------------------------------------------------------------------- VME_Br_Lev 0x03 Bus request level 3 for master cycles
VIC_Arb_Mode 0x00 Arbitration mode is round robin
VME_Fair_Req 0x00 VMEbus fair requester disabled
VIC_Loc_Bus_To 0x05 Local bus timeout period is 256
microseconds
VME_Bus_To 0x06 VMEbus timeout period is 512
microseconds
VIC_Rel_Mode 0 Release mode is release on request
(ROR)
VIC_Syscon 1 System controller VMEbus reset
is enabled
VIC_Wrt_Post 0 Disable VIC master write posting
VIC_DMA_Intrlv 15 DMA interleave gap is 3.75
microseconds (value * 250 nanoseconds)
Lmt_DMA_Rd 0 No DMA read limit
Lmt_DMA_Wrt 0 No DMA write limit
Frce_Hw_DMA 0 Do not force hardware DMA engine fo
SMP system
A32_Base 0x08000000 A32 inbound DMA window base address
A32_Size 0x8000000 A32 window size (128 MB)
A24_Base 0x00C00000 A24 inbound DMA window base address
A24_Size 0x400000 A24 window size (4 MB)
A16_Base 0x00000100 A16 interprocessor communication base
address
A16_Mask 0x00000000 A16 interprocessor communication mask
A24_A32_Ovrlap 1 Inbound A24/A32, if same space, overlap
The following VMEbus interrupt parameters provide initial defaults that are later overwritten by system priority level (SPL) values sup-
plied by the platform. See the values listed in System Configuration Supplement: OEM Platforms, or query the values at run time using the
command sysconfig -q vba_vipvic. Parameter Default Meaning --------------------------------------------------------------------
Irq0_SPL 3 VMEbus IRQ level to system SPL map
Irq1_SPL 3 VMEbus IRQ 1 to SPL SPLDEVLOW
Irq2_SPL 3 VMEbus IRQ 2 to SPL SPLDEVLOW
Irq3_SPL 3 VMEbus IRQ 3 to SPL SPLDEVLOW
Irq4_SPL 3 VMEbus IRQ 4 to SPL SPLDEVLOW
Irq5_SPL 3 VMEbus IRQ 5 to SPL SPLDEVLOW
Irq6_SPL 3 VMEbus IRQ 6 to SPL SPLDEVLOW
Irq7_SPL 3 VMEbus IRQ 7 to SPL SPLDEVLOW
Adapt_Blk_SPL 3 Adapter resource blocking SPL
SPLDEVLOW
DMA_Access_Space 0 Adapter MBLT I/O access: sparse
RELATED INFORMATION
Interfaces: sys_attrs_vme_vba(7), sys_attrs_vba_univ(7), sysconfigdb(8), sys_attrs(5)
System Configuration Supplement: OEM Platforms, Device Driver Kit manual Writing VMEbus Device Drivers delim off
vme_manual_setup(7)