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gpiobus(4) [freebsd man page]

GPIO(4) 						   BSD Kernel Interfaces Manual 						   GPIO(4)

NAME
gpiobus -- GPIO bus system SYNOPSIS
To compile these devices into your kernel and use the device hints, place the following lines in your kernel configuration file: device gpio device gpioc device gpioiic device gpioled Additional device entries for the ARM architecture include: device a10_gpio device bcm_gpio device imx51_gpio device lpcgpio device mv_gpio device ti_gpio device gpio_avila device gpio_cambria device zy7_gpio device pxagpio Additional device entries for the MIPS architecture include: device ar71xxx_gpio device octeon_gpio device rt305_gpio Additional device entries for the POWERPC architecture include: device wiigpio device macgpio DESCRIPTION
The gpiobus system provides a simple interface to the GPIO pins that are usually available on embedded architectures and can provide bit banging style devices to the system. The acronym GPIO means ``General-Purpose Input/Output.'' The BUS physically consists of multiple pins that can be configured for input/output, IRQ delivery, SDA/SCL iicbus use, etc. On some embedded architectures (like MIPS), discovery of the bus and configuration of the pins is done via device.hints(5) in the platform's kernel config(5) file. On some others (like ARM), where FDT(4) is used to describe the device tree, the bus discovery is done via the DTS passed to the kernel, being either statically compiled in, or by a variety of ways where the boot loader (or Open Firmware enabled system) passes the DTS blob to the kernel at boot. The following device.hints(5) are only provided by the ar71xx_gpio driver: hint.gpio.%d.pinmask This is a bitmask of pins on the GPIO board that we would like to expose for use to the host operating system. To expose pin 0, 4 and 7, use the bitmask of 10010001 converted to the hexadecimal value 0x0091. hint.gpio.%d.pinon This is a bitmask of pins on the GPIO board that will be set to ON at host start. To set pin 2, 5 and 13 to be set ON at boot, use the bitmask of 10000000010010 converted to the hexadecimal value 0x2012. hint.gpio.function_set hint.gpio.function_clear These are bitmasks of pins that will remap a pin to handle a specific function (USB, UART TX/RX, etc) in the Atheros function registers. This is mainly used to set/clear functions that we need when they are set up or not set up by uBoot. Simply put, each pin of the GPIO interface is connected to an input/output of some device in a system. SEE ALSO
gpioiic(4), gpioled(4), iicbus(4), gpioctl(8) HISTORY
The gpiobus manual page first appeared in FreeBSD 10.0. AUTHORS
This manual page was written by Sean Bruno <sbruno@FreeBSD.org>. BSD
November 5, 2013 BSD

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CPU_ELAN(4)						 BSD/i386 Kernel Interfaces Manual					       CPU_ELAN(4)

NAME
CPU_ELAN -- AMD Elan 520 CPU support SYNOPSIS
options CPU_ELAN options CPU_ELAN_PPS options CPU_ELAN_XTAL machdep.elan_gpio_config machdep.elan_freq options CPU_SOEKRIS DESCRIPTION
The options CPU_ELAN enables support for the AMD Elan 520 CPU. A device /dev/elan-mmcr exports the MMCR register bank to userland using mmap(2). The i8254 timer will be adjusted to the slightly unorthodox frequency 1189161 Hz (32768 * 45 * 25 / 31) employed by the Elan. A timecounter named ``ELAN'' is implemented using the general purpose timer 2, but it will not be usable unless HZ is configured at 150 or higher. This timecounter is much better than the ``i8254'' timecounter and should be used at all times. The machdep.elan_gpio_config sysctl(8) variable enables configuration of the GPIO pins of the CPU. The string must be exactly 32 characters long. A '-' means the GPIO is unavailable. A 'l' (lower-case ell) configures a led(4) device (active low). A 'L' configures a led(4) device (active high). A '.' means no configuration for this GPIO. These led(4) devices will be named /dev/led/gpio%d. For meaning of 'P', 'e' and 'E', see under options CPU_ELAN_PPS. The options CPU_ELAN_XTAL and the machdep.elan_freq sysctl(8) variable can be used to set the CPU clock crystal frequency in Hz. The default is 33333333 Hz. The options CPU_ELAN_PPS enables precision timestamping using the RFC2783 PPS-API via the /dev/elan-mmcr device. The resolution will be approximately 125 nsec and the precision +- 125 nsec. (For 125 nsec read ``4 / CPU clock crystal frequency''.) The input signal must be connected to the TMR1IN pin and a GPIO pin. The GPIO pin must be configured with a 'P' in machdep.elan_gpio_config. In addition, one GPIO pin can be configured with either 'e' (active low) or 'E' (active high) to become a ``echo'' output of the input sig- nal. Please notice that this signal is not suitable for calibration. If the options CPU_SOEKRIS is given, the support will additionally be tailored to the Soekris Engineering 45xx series of embedded computers. The ``error'' led will be configured (as /dev/led/error) and the GPIO pins which are not available will be disabled. SEE ALSO
led(4), sysctl(8) HISTORY
The CPU_ELAN code first appeared in FreeBSD 4.7. AUTHORS
Poul-Henning Kamp <phk@FreeBSD.org> BSD
November 23, 2003 BSD
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