Sponsored Content
Top Forums Shell Programming and Scripting how to programmatically generate makefile variable Post 302536015 by Corona688 on Monday 4th of July 2011 01:05:46 AM
Old 07-04-2011
There's supposed to be a better way in GNU make, a 'simple variable', done with VAR:=`something` but it doesn't do what it says it's supposed to, and just evaluates every time.

Short of creating a makefile from template or something, I don't think so.
 

10 More Discussions You Might Find Interesting

1. Programming

how to find usb ports programmatically

I need to find out where a usb flash memory drive is mounted. I have used prtconf and iostat to find the information and then used popen to parse the information to find what i need. I am wondering if there are some generic functions such as ddi_ or usb_ that i can use to find such info. I would... (1 Reply)
Discussion started by: jtcoelho
1 Replies

2. Shell Programming and Scripting

Is there any way to set env variable in top level Makefile and unset when done

Hello I have compilation directory structure the top level Makefile is the one that contains all the sub directories I want to set in this Makefile env variable say : setenv OPTIMIZATION_LEVEL "1" and when all the sub directories done compiling it will set this variable to different lavel... (0 Replies)
Discussion started by: umen
0 Replies

3. Shell Programming and Scripting

alternative for recursive variable in Makefile?

Hi, I want to append some compiler flags to CFLAGS_LOCAl variable defined in one makefile. I am trying to append required flags in another makefile like this: CFALGS_LOCAL = $(CFLAGS_LOCAL) +check=all but when I make, I get the error: ../../../../rules/target.rules:4: *** Recursive... (2 Replies)
Discussion started by: prits31
2 Replies

4. UNIX for Advanced & Expert Users

Makefile problem - How to run module load in a Makefile

Hi, I'm trying to run the module load command in a Makefile and i'm getting the following error: make: module: command not found Why is this? Is there any way to run this command in a Makefile? NOTE: command - module load msjava/sunjdk/1.5.0 works fine outside of the Makefile (2 Replies)
Discussion started by: hernandinho
2 Replies

5. Programming

Makefile: multiple target variable substitution

Greetings! Basically, I would like to properly handle this with gnu make: alltools: my_tool mysecond_tool mythird_tool etc_tool %_tool: dir1/%_tool.vf dir2/%_tool/subdir2/%_tool.ver <tab>@echo done %.vf: <tab>RUN_VF $* %.ver: <tab>RUN_VER $* So, if I were to do something like:... (0 Replies)
Discussion started by: Harlinator
0 Replies

6. Solaris

Setting/Modifying variable specific to target in Makefile

Hi, I have a small piece of Makefile script which throw's error on Sun Sparc machine, but works fine with Sun Optron, Linux, AIX machines. FOO=Naveen test1:FOO=Dhilip test1: @echo FOO is ${FOO} test2: @echo Me is ${FOO} Output on Sun Sparc - ukhml-v890new-~/test: make test1... (5 Replies)
Discussion started by: nsriram
5 Replies

7. Homework & Coursework Questions

Help with Simple Multi-Level Makefile (Extremely New at Makefile)

Use and complete the template provided. The entire template must be completed. If you don't, your post may be deleted! 1. The problem statement, all variables and given/known data: Basically, the prompt is make a makefile with various sub makefiles in their respective subdirectories. All code... (1 Reply)
Discussion started by: Tatl
1 Replies

8. Shell Programming and Scripting

Makefile doesn't update $< variable

Hello guys, I could use advise from more experienced guys about my Makefile. In short, the problem with my Makefile is that $< doesnt change inside my rule. Here is my Makefile: # Makefile for CORE CC = gcc.exe AS = as.exe AR = ar.exe INCLUDE = \ -I../lib/tomcrypt/inc \... (1 Reply)
Discussion started by: Kodreanu
1 Replies

9. Shell Programming and Scripting

Chopping off the last directory in a Makefile variable

Hi everybody, I have a Makefile where I need to use an environment variable that I set, MYBUILDPATH. The variable can be different depending on the computer, but it always ends with /myBuildRoot/data_tables. Sometimes the data_tables directory will have a slash after it, sometimes not, depending... (2 Replies)
Discussion started by: Zel2008
2 Replies

10. UNIX for Advanced & Expert Users

Help with detaching the screen programmatically

Hi, I am using screen utility for protecting from ssh disconnects. My process flow i ssomething like : a) I start screen from my desktop terminl. b)In the screen session, i ssh to one host and execute a command c)Once the above command is completed,i would like to exit via ctr-a or... (4 Replies)
Discussion started by: pandeesh
4 Replies
ccmakedep(1)						      General Commands Manual						      ccmakedep(1)

NAME
ccmakedep - create dependencies in makefiles using a C compiler SYNOPSIS
ccmakedep [ cpp-flags ] [ -wwidth ] [ -smagic-string ] [ -fmakefile ] [ -oobject-suffix ] [ -v ] [ -a ] [ -cccompiler ] [ -- options -- ] sourcefile ... DESCRIPTION
The ccmakedep program calls a C compiler to preprocess each sourcefile, and uses the output to construct makefile rules describing their dependencies. These rules instruct make(1) on which object files must be recompiled when a dependency has changed. By default, ccmakedep places its output in the file named makefile if it exists, otherwise Makefile. An alternate makefile may be speci- fied with the -f option. It first searches the makefile for a line beginning with # DO NOT DELETE or one provided with the -s option, as a delimiter for the dependency output. If it finds it, it will delete everything following this up to the end of the makefile and put the output after this line. If it doesn't find it, the program will append the string to the makefile and place the output after that. EXAMPLE
Normally, ccmakedep will be used in a makefile target so that typing 'make depend' will bring the dependencies up to date for the makefile. For example, SRCS = file1.c file2.c ... CFLAGS = -O -DHACK -I../foobar -xyz depend: ccmakedep -- $(CFLAGS) -- $(SRCS) OPTIONS
The program will ignore any option that it does not understand, so you may use the same arguments that you would for cc(1), including -D and -U options to define and undefine symbols and -I to set the include path. -a Append the dependencies to the file instead of replacing existing dependencies. -cccompiler Use this compiler to generate dependencies. -fmakefile Filename. This allows you to specify an alternate makefile in which ccmakedep can place its output. Specifying "-" as the file name (that is, -f-) sends the output to standard output instead of modifying an existing file. -sstring Starting string delimiter. This option permits you to specify a different string for ccmakedep to look for in the makefile. The default is "# DO NOT DELETE". -v Be verbose: display the C compiler command before running it. -- options -- If ccmakedep encounters a double hyphen (--) in the argument list, then any unrecognized arguments following it will be silently ignored. A second double hyphen terminates this special treatment. In this way, ccmakedep can be made to safely ignore esoteric compiler arguments that might normally be found in a CFLAGS make macro (see the EXAMPLE section above). -D, -I, and -U options appearing between the pair of double hyphens are still processed normally. SEE ALSO
cc(1), make(1), makedepend(1), ccmakedep(1). AUTHOR
ccmakedep was written by the X Consortium. Colin Watson wrote this manual page, originally for the Debian Project, based partly on the manual page for makedepend(1). X Version 11 imake 1.0.5 ccmakedep(1)
All times are GMT -4. The time now is 06:58 AM.
Unix & Linux Forums Content Copyright 1993-2022. All Rights Reserved.
Privacy Policy